(1) Field of the Invention.
This invention relates to bipolar transistors and to improved methods of fabricating such transistors. The method of fabrication eliminates the requirement of depositing an epitaxial layer, while providing a buried subcollector region.
(2) Description of the Prior Art.
High frequency bipolar transistors, as used in micro-miniaturized integrated circuit devices, utilize a buried subcollector. The conventional process for forming a buried subcollector is to introduce an impurity for semiconductors into a monocrystalline semiconductor substrate to form high impurity concentration regions adjacent to the surface. An epitaxial semiconductor layer is deposited the substrate over the regions. The impurity normally diffuses upward for a small distance into the epitaxial layer. The various active regions of the bipolar device are then formed into the epitaxial layer to complete the transistor.
However, the epitaxial process is time consuming and expensive. Further, the yield of usable product is low.
It is an object of the invention to provide a process for forming a bipolar transistor for integrated circuit devices that does not require the use of an epitaxial layer.
Another object of the invention is to provide a bipolar transistor provided with a subcollector region that is contained entirely in the intrinsic semiconductor material of a monocrystalline semiconductor substrate.
In accordance with the aforementioned objectives, there is provided a process for forming a bipolar transistor wherein a collector layer and a thinner overlying base layer are formed in a semiconductor substrate by introducing impurity ions into the substrate. After depositing a polycrystalline layer on the surface of the substrate, an emitter region and a spaced base contact region are formed in the base layer by ion implantation of the appropriate impurities. A masking implant-stopping layer, for example tungsten, molybdenum or tantalum metal is deposited and shaped to overly the emitter and base contract regions. The substrate is then anisotropically etched to a depth slightly deeper than the emitter and base contact regions. The area between the emitter and base contact regions is masked and the etching continued through the collector layer to complete a pedestal structure. A implant-stopping layer is deposited and anisotropically etched to form implant-stopping layers on the vertical walls of the pedestal. A subcollector is formed beneath the collector layer by implanting impurity ions at an angle to the top surface of the substrate. The masking layer is removed and terminals formed to join the elements of the transistor.
A bipolar pedestal transistor is presented having a subcollector, wherein all of the elements are in the intrinsic monocrystalline semiconductor substrate. A major pedestal contains a lower collector layer and an overlying base layer. Two spaced minor pedestals are supported on the major pedestal. An emitter region is provided in a first minor pedestal in contact with the base layer, and a base contact region is provided in the second minor pedestal, also in contact with the base layer. A subcollector is provided in the substrate beneath the major pedestal in contact with the collector layer.